Transistor and logic gate made from undoped silicon nanowires | KurzweilAI


a) Schematic of a multi-gate device made from a single, undoped SiNW. Two wrap-gates, labeled as GS and GD, are designed to control the Schottky barriers at the silicide-silicon junctions formed by the source and drain contacts. The finger gate in the middle, labeled as GC, is meant to control carrier population in the silicon channel. b) SEM micrograph of the device. Scale bar: 400nm. (Credit: Massimo Mongillo, Panayotis Spathis, Georgios Katsaros, Pascal Gentile, Silvano De Franceschi)

Researchers in France have fabricated a transistor and two types of diode from undoped silicon nanowires (SiNWs), and combined them into a NAND logic gate.

Nanometer-scale electronic devices fabricated from SiNWs are drawing significant attention in view of their reduction in size and potential application in electronics, optoelectronics, and biochemical sensing.

Unlike the photolithography used in current chip- making, nanowires are easy to make on a nanometer scale.

But at that small scale, the electronic properties of silicon can depend on the precise location of dopants (trace impurities used to alter electrical properties), which is difficult to control and keep consistent.

The alternative — using undoped wires — makes it difficult to form low-resistance contacts due to the presence of a Schottky barrier at the metal-silicon interface.

The researchers got around these problems by coating the nanowire with nickel silicide sections at the junction with a metal contact, preventing the formation of  Schottky barriers. By independently tuning the effective Schottky barrier heights, a variety of reconfigurable device functionalities could be obtained.


Schematic of a NAND logic gate based on two dual-gate SiNW devices. One device acts as an input stage, while the second one acts a feedback stage to enforce the correct output voltage (credit: Massimo Mongillo, Panayotis Spathis, Georgios Katsaros, Pascal Gentile, Silvano De Franceschi)

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